Multibit-RRAM readout circuits based on non-balanced inverters

SANCA, G.A.; GARCIA-INZA, M.; GOLMAR, F.

MICROELECTRONICS JOURNAL

ELSEVIER SCI LTD

Año: 2021 vol. 108

0026-2692

The demand for electronic memories with increasing storage capabilities is always on the rise. Increasing the information density in the same silicon area is a desirable feature, making fast multilevel resistive switching devices a promising candidate. It is thus necessary to design writing and readout circuits that are able to take advantage of the technology´s features. In this work, two multibit readout circuits based on non-balanced inverter are presented. The first one is a simple and size reduced flash-type ADC made of inverters, while the second one is a counter-type ADC circuit. Simulations were performed in 0.18 μm CMOS technology using a memristor model extracted from bibliography in order to analyze and compare functionality, power consumption and speed access. The resulting reading time is lower than 1.5 ns for the flash-type ADC and 12 ns for the counter-type ADC. Regarding layout area, the core circuit of the first architecture was implemented in 165 μm2 and the second in 798 μm2.