Specification, Design and Implementation of a Pattern-Based Parallel Programming Framework

GERVASIO D PEREZ

Ciudad Autónoma de Buenos Aires

Simposio; 3rd ICSE 2017 PhD and Young Researchers Warm Up Symposium; 2016

Universidad de Buenos Aires y Universidad Nacional de Tres de Febrero

Developing correct and efficient parallel software in a cost-effective way is challenging. There are a number of programming pitfalls that lead to incorrect behaviors and poor performance. Pattern-based parallel software design, in the form of algorithmic skeletons, can help achieving implementation correctness, scalability and programmer productivity. Recent algorithmic skeleton approaches provide type safe skeletons supporting composition. Some issues of these approaches are the number of patterns the user has to consider and the complexity in composing those in order to design a solution. As an attempt to overcome these issues, the contribution of this thesis is threefold. First, it discusses a parallel-programming pattern, called PCR, consisting of producers, consumers, and reducers which operate concurrently on data sets. To favor correctness, the semantics of a PCR is mathematically defined in terms of the FXML formalism. PCRs are shown to be composable and to seamlessly subsume other well-known parallel-programming patterns, thus providing a framework for heterogeneous designs. Second, it formally shows how the PCR pattern can be correctly implemented it terms of a more concrete parallel execution model; for the scope of this thesis we focus on Intel Concurrent Collections. Third, it proposes a platform-agnostic C++ template library to express PCRs. It briefly presents a prototype compiler based on C++ template re-writing which automatically generates distributed implementations relying on the Intel Concurrent Collections C++ library. The programming and code-generation suite is illustrated through several case studies. In the final stage of this thesis, we explore extensions to the PCR specification to provide high level optimization hints in order to generate efficient implementations.