Design and Implementation of a Genetic Algorithm with Integer Number Coding for the Evolution of FPGAs in Space Applications

JUAN PABLO CAPOSSIO; JUAN JORGE QUIROGA; FRANCISCO PAZ

Bahía Blanca

Congreso; XVIII CONGRESO ARGENTINO DE CIENCIAS DE LA COMPUTACIÓN; 2012

In [1] a form of representation of logic circuits by chains of integernumbers is presented. That type of representation is easy to simulate and toexport to FPGA hardware in such a way that, by adding a genetic algorithm(GA), it can be used in an evolutionary process. Because regular GAs utilizebinary number coding, one was designed, with all its operators and processes,that uses integer number coding. This evolvable hardware (EH) process wastested with more than 200 hours of runs to determine the effectiveness of theinteger coded GA. Results show that, given the proper conditions, the GA iseffective in finding solutions that fulfill the required needs of the target systemand that this particular EH platform is suitable for applications where faulttolerance capability is required, such as space systems.