IIIE 20352
INSTITUTO DE INVESTIGACIONES EN INGENIERIA ELECTRICA "ALFREDO DESAGES"
Unidad Ejecutora - UE
congresos y reuniones científicas
Título:
Implementation of a High-Resolution Symmetric PWM Based on Custom CMOS Delay Lines
Autor/es:
FERNANDO CHIERCHIE; JUAN I. MORALES; EDUARDO E. PAOLINI; PABLO S. MANDOLESI
Lugar:
Bahía Blanca, Buenos Aires
Reunión:
Congreso; XVIII Reunión de trabajo en Procesamiento de la Información y Control; 2019
Institución organizadora:
Universidad Nacional del Sur
Resumen:
An all-digital high-resolution symmetric pulse-width modulator based on a custom delay integrated circuit is presented. The topology uses two complementary trailing-edge PWMsignals from an FPGA to set the coarse adjustment of the symmetric duty-cycles, and the fine adjustment is provided by digitally-controlled delay lines with adjustable time resolution,implemented in a custom integrated circuit. More than 20 dB of reduction in the total harmonic distortion plus noise (THD+N) was measured with the proposed approach for a 1 kHz signal.
