IIIE 20352
INSTITUTO DE INVESTIGACIONES EN INGENIERIA ELECTRICA "ALFREDO DESAGES"
Unidad Ejecutora - UE
congresos y reuniones científicas
Título:
A 1.6gb/s cmos lvds transmitter with a programmable pre-emphasis system
Autor/es:
BENJAMÍN T. REYES; G. PAULINA; L. TEALDI; E. LABAT; P MANDOLESI; M. R. HUEDA
Lugar:
Santiago
Reunión:
Congreso; IEEE 5th Latin American Symposium on Circuits and Systems (LASCAS 2014); 2014
Institución organizadora:
IEEE
Resumen:
A 12 parallel low voltage differential signaling (LVDS) transmitter fabricated in 0.13 μm CMOS is presented. Each LVDS channel can operate over 1.6 Gb/s and includes a programmable pre-emphasis circuit designed to reduce the data-dependent jitter (DDJ) caused by different lengths of PCB traces. Experimental results of the fabricated LVDS confirm the correct operation of the programmable pre-equalization circuit. The power consumption and area per channel is less than 20 mW and 0.084 mm2, respectively.
