Design of a skipper CCD-in-CMOS active pixel sensor

B. PARPILLON; L. ROTA; M. SOFO HARO; F. ALCALDE BESSIA; A. GUPTA

Stony Brook

Workshop; Coordinating Panel for Advanced Detectors (CPAD); 2022

Stony Brook University

The Skipper-in-CMOS Application Specific Integrated Circuit (ASIC) is an image sensor prototype fabricatedin a 180nm CMOS imaging process and intended for a wide range of scientific applications such as low-massdark matter searches, deep measurement of dark energy and dark matter signatures or single-photon quantumsensing.The goal of this prototype is to integrate the non-destructive readout capability of skipper Charge CoupledDevices (CCDs) with a high conversion gain pinned photodiode on a CMOS imaging process, while takingadvantage of in-pixel signal processing.Our prototype integrates a 200x200 pixel matrix with 18 different CCD-in-CMOS pixel structures, connectedto 10 analog readout channels. The pixel matrix is readout in a rolling shutter scheme. The different pixeldesigns will allow the study of several process parameters like PPD to CCD charge transfer, conversion gain,CCD charge transfer and full well capacity.Each readout channel consists of a pre-amplifier, a 20:1 analog MUX with differential track / hold capabilitiesand a differential buffer to drive an off-chip ADC. The channels have 4-bit gain settings, 2-bit trimmablebandwidth. The simulated equivalent noise charge for a single readout is 1.6e-. Sub-electron noise can beachieved by reading out multiple samples of the same charge packet using the skipper technique and averagingthe output signal. A high-speed readout with a minimum integration time of 250ns is possible and the unity-gain linear dynamic range is 11,000e-.