Analog pile-up circuit technique using a single capacitor for the readout of Skipper-CCD detectors

SOFO HARO, MIGUEL; CHAVEZ, CLAUDIO; LIPOVETZKY, JOSÉ; ALCALDE BESSIA, FABRICIO; CANCELO, GUSTAVO; CHIERCHIE, FERNANDO; ESTRADA, JUAN; FERNANDEZ MORONI, GUILLERMO; STEFANAZZI, LEONARDO; TIFFENBERG, JAVIER; UEMURA, SHO

JOURNAL OF INSTRUMENTATION

IOP PUBLISHING LTD

Lugar: Londres; Año: 2021

1748-0221

With Skipper-CCD detectors it is possible to take multiple samples of the charge packetcollected on each pixel. After averaging the samples, the noise can be extremely reduced allowingthe exact counting of electrons per pixel. In this work we present an analog circuit that, with aminimum number of components, applies a double slope integration (DSI), and at the same time, itaverages the multiple samples producing at its output the pixel value with sub-electron noise. Forthis prupose, we introduce the technique of using the DSI integrator capacitor to add the skippersamples. An experimental verification using discrete components is presented, together with ananalysis of its noise sources and limitations. After averaging 400 samples it was possible reach areadout noise of 0.2erms/pix, comparable to other available readout systems. Due to its simplicityand significant reduction of the sampling requirements, this circuit technique is of particular interestin particle experiments and cameras with a high density of Skipper-CCDs.