INVESTIGADORES
SPINELLI Enrique Mario
artículos
Título:
SoC-FPGA systems for the acquisition and processing of electroencephalographic signals
Autor/es:
M. OLIVA; P. GARCÍA; E. SPINELLI; A. VEIGA
Revista:
International Journal of Reconfigurable and Embedded Systems
Editorial:
Iaescore
Referencias:
Año: 2021 vol. 10 p. 237 - 248
ISSN:
2089-4864
Resumen:
Real-time acquisition and processing of electroencephalographic signals havepromising applications in the implementation of brain-computer interfaces.These devices allow the user to control a device without performing motoractions, and are usually made up of a biopotential acquisition stage and apersonal computer (PC). This structure is very flexible and appropriate forresearch, but for final users it is necessary to migrate to an embedded system,eliminating the PC from the scheme. The strict real-time processingrequirements of such systems justify the choice of a system on a chip fieldprogrammable gate arrays (SoC-FPGA) for its implementation. This articleproposes a platform for the acquisition and processing ofelectroencephalographic signals using this type of device, which combinesthe parallelism and speed capabilities of an FPGA with the simplicity of ageneral-purpose processor on a single chip. In this scheme, the FPGA is incharge of the real-time operation, acquiring and processing the signals, whilethe processor solves the high-level tasks, with the interconnection betweenprocessing elements solved by buses integrated into the chip. The proposedscheme was used to implement a brain-computer interface based on steadystate visual evoked potentials, which was used to command a speller. Thefirst tests of the system show that a selection time of 5 seconds per commandcan be achieved. The time delay between the user?s selection and the systemresponse has been estimated at 343 µs.