Control and Management Plane in a Multistage Software Router Architecture

A. BIANCO, R. BIRKE, J. M. FINOCHIETTO, L. GIRAUDO, F. MARENCO, M. MELLIA, A. KHAN, D. MANJUNATH

Shangai, China

Conferencia; IEEE International Conference on High Performance Switching and Routing (HPSR); 2008

IEEE

Software routers based on Personal Computer (PC) architectures are receiving increasing attention in the research community. However, a router based on a single PC suffers from limited bus and Central Processing Unit (CPU) bandwidth, high memory access latency, limited scalability in terms of number of network interface cards, and lack of resilience mechanisms. Multistage architectures created by interconnecting several PCs are an interesting alternative since they allow to i) increase the performance of single-software routers, ii) scale router size, iii) distribute packet-forwarding and control functionalities, iv) recover from single-component failures, and v) incrementally upgrade router performance. However, a crucial issue is to hide the internal details of the interconnected architecture so that the architecture behaves externally as a single router, especially when considering the control and the management plane. In this paper, we describe a coordination protocol for a previously proposed multistage architecture based on PC interconnection. The protocol permits information exchange among internal PCs to support: i) configuration of the interconnected architecture, ii) packet forwarding, iii) routing table distribution, iv) management of the internal devices. The protocol is operating system independent, since it interacts with software routing suites such as Quagga and Xorp. The protocol is under test in our labs on a small-scale prototype of the multi-stage router.