Estudio de pre-factibilidad y/o factibilidad

PABLO ANTOSZCZUK; MARCOS FUNES; EMILIANO PENOVI; ROGELIO GARCIA RETEGUI; GUSTAVO UICICH; DANIEL CARRICA; PABLO ANTOSZCZUK; MARCOS FUNES; EMILIANO PENOVI; ROGELIO GARCIA RETEGUI; GUSTAVO UICICH; DANIEL CARRICA

2017-03-01/2017-03-31

1-39

Electrónica

Energia

This technical report is associated to the STAN denominated "Analysis of hardware alternatives for high-current power supplies hot-swapping". ESRF has engineered a strategy to deal with power supply failures during operation, consisting in having available a limited number of spare supplies and a method to switch from a defective unit to a spare one, where the main goal is to minimize the system down time. The proposed method uses semiconductor-based SPDT-like switches to connect a load either to its intended power supply or to any of the spares.  The objective of this analysis is to conduct research and to provide suitable, low-loss and cost-effective alternatives for the manufacture of the required switching cells.Objectives:First Part:To perform a theoretical research of possible hardware alternatives to build the semiconductor-based switches and its control logic. Besides the required performance and the operating conditions, the related cost will also be considered along the study. A feasibility prototype will be built in order to measure and verify the switching cell performance, when possible.1-1At least two versions of the switches are possible and they will be studied in terms of effectiveness, cost and resulting ROI.1-1.1A first option using two reversely series-connected Si-MOS as a four quadrant interrupt.1-1.2A second option using one Si-MOS and a high-efficiency Schottky diode in series.1-2Other general boundary conditions to consider: 1-2.1The MOS RDSON proposed should be equal or better than 1mohm, for a cost-weighted average current of 100A, with a maximum current of 120A, 7500 h/yr running time and the energy cost about 60 ? /MWh including tax.1-2.2There will be two switches per magnet load for a 16 x 32 total magnets for the quadrupole case.1-2.3PCB area / size limits, cost of parts, system water cooling inlets and power losses.1-2.4Abnormalities and/or transient behavior produced by possible failures. Second Part:2-1 Analysis of the most efficient way to implement 16 inputs + 4 spares with 16 outputs (160 switches) within 600mm x 1200mm board area in case the whole proposed solution fits, or any other subdivision: 16 x (1i+4s -> 1o ), or 8 x ( 2i+4s -> 2o), or 4 x ( 4i+4s -> 4o), or 2 x ( 8i+4s -> 8o).