Design and Implementation of a PLC Channel Emulator on Hardware

NICOLÁS MATSUNAGA; CECILIA G. GALARZA

San Carlos de Bariloche

Congreso; XV Reunión de Procesamiento de la Información y Control; 2013

Universidad Nacional de Río Negro

Channel emulators are useful tools in the design, validation and verification of communication systems. In this paper we present the development and implementation of a PLC channel emulator on a hardware platform. Restricted by real-time requirements, we selected FPGA technology for our system. The emulator reproduces six different classes of disturbances and multiple channel transfer functions. We designed and developed the emulator following aModel-Based Design approach. As a result, we have a block-based, flexible and easily adaptable system.