IIIE 20352
INSTITUTO DE INVESTIGACIONES EN INGENIERIA ELECTRICA "ALFREDO DESAGES"
Unidad Ejecutora - UE
congresos y reuniones científicas
Título:
Memory based computation core for nonlinear neural operations
Autor/es:
M. VILLEMUR, P. JULIAN; G. TOGNETTI
Lugar:
Mar del Plata
Reunión:
Congreso; Argentina Conference on Electronics; 2019
Institución organizadora:
Universidad Nacional de Mar del Plata
Resumen:
In this paper we introduce a memory based processorthat can produce linear and nonlinear operations. Wefabricated an array of 9 cores occupying 1.5mm 1.5mm in a130nm technology. Every core has 32 8-bit inputs. The integratedcircuit (IC) runs at 85MHz with a power supply of 1.1V andconsumes 2.1mW. At this operating point, the IC produces 1008-bit MOPS and exhibits an efficiency of 21.9 pJ/OP.
